Posts by LaForge

    I thought it would be a good idea to share this open source hardware project here:…e-SSD-to-miniPCIe-adapter

    It is a mechanical adapter that allows you to run regular M.2 NVMe SSDs inside a PC-Engines APU.

    It doesn't state it on the project page, but allegedly somebody even managed to boot from NVMe. I just read that somewhere, and I'm not sure if its with unmodified official BIOS or whether a modified coreboot was needed.

    I'm not sure how many people are interested in NVMe SSDs in their APU, but given the low parts/BOM cost, it might even be worth a try adding such an adapter to the PC-Engines product portfolio / shop? Doing a "reall" production run would have the advantage of proper beveled edges and hard golt plating, both of which are to expensive when doing a few one-off prototype PCBs.

    Thanks to Pascal Dornier of pc-engines who pointed me to the BIOS and Kernel Developer Guide available at…h_Models_30h-3Fh_BKDG.pdf and specifically to the USB section of it, I could identify what needed to be done to re-route the physical USB-A connectors on the APU2 from XHCI to EHCI:

    * re-route the USB8+USB9 from XHCI to EHCI

    * enable the EHCI2 controller

    * re-xcan the PCI bus to detect the new EHCI controller

    Afterwards, any devices plugged into the USB A connectors on the APU2 boards enumerate on the EHCI instead of the XHCI controller.

    The source-code of a related tool to perform these steps is available at - in case anyone else runs into this problem.

    There are some use cases where USB devices work very well with EHCI (and even UHCI+OHCI) but fail to work with XHCI. This is mostly due to XHCI controllers handling more of the USB protocol internally (with related non-fixable firmware bugs/shortcomings), while predecessors are more software-defined.

    So in such use cases, one normally wants to route the USB traces of the physical USB connectors to the EHCI controller IP core, rather than the XHCI controller. For Intel XHCI there are some more or less standard ways to do this via PCI configuration space. One good explanation is found at…in-usb-2-0-mode-in-linux/

    Now the question is: How to achieve this on an APU2? I have unloaded xhci_pci and now I only have the EHCI linux driver bound to the two EHCI controllers. However, the attached low/full/high speed devices do not show up on the EHCI controllers.

    I couldn't find any register-level documentation of the AMD XHCI, but maybe somebody at PC Engines could check how to determine where the USB 2 DN/DP of the physical connectors should be routed internally (XHCI vs. EHCI) and share this information with the APU users.

    Thanks in advance!